Basic addition operations performed in a computer follow the rules of binary arithmetic. Additon is the operation in which one number, an addend, is combined with a second number or addend (which may also be known as an augend) to form a sum.
One technique for performing the addition operation uses a binar counter to arrive at the results of the sum. In employing this technique a number of pulses equivalent to one of the numbers are counted first and then the counter continues by counting a series of pulses equal to the other number. Upon the completion of both these counts, the number in the counter is the total number of pulses that were sensed, or the sum of the two numbers. This method is relatively slow, however, and also requires extensive, comparatively complex equipment. True arithmetic computation of binary members is much faster, uses less equipment, and simplifies the handling of binary data.
For example, binary addition if performed in much the same manner as ordinary decimal addition and follows three rules, i.e., a binary 0 and a binary 0 produces the sum of a binary 0; a binary 1 and a binary 0 produces the sum of a binary 1; and, a binary 1 added to a binary 1 produces a sum of a binary 10 (or 0 and carry 1).
For example, a decimal number 13 added to the decimal number four = decimal 17. In the binary arithmetic addition, the decimal number thirteen is expressed binarily as 1101, while the decimal number four is expressed binarily as 100.
These binary numerical expressions are combined arithmetically to produce the resultant binary sum as follows: the 0 order digits, i.e., the digits of least significance, are combined or added arithmetically to form a sum of a binary 1 in accordance with the foregoing rules of binary addition; the first order digits are then combined or summed arithmetically to arrive at the resultant sum of a binary 0 in accordance with the foregoing rules of binary addition; the second order digits are combined or summed in similar manner to form the resultant sum of a binary 10, or "0 and carry the 1"; the third order digits are then combined with the carry from the second order to form the sum of a binary 10. This operation may be expressed as,
______________________________________ Carry: ##STR1## ______________________________________
since the decimal equivalent of the binary expression 10001 is
______________________________________ 1 .times. 2.sup.4 = 1 .times. 16 = 16 0 .times. 2.sup.3 = 0 .times. 8 = 0 0 .times. 2.sup.2 = 0 .times. 4 = 0 0 .times. 2.sup.1 = 0 .times. 2 = 0 ##STR2## ______________________________________
it has been demonstrated that the binary sum is the same as the decimal sum,
______________________________________ 13 +4 17 ______________________________________
To implement the binary sum and carry process electronically, it is necessary to transform the rules for binary addition into logic equations and then develop a logic design and fabricate a logic circuit which satisfies the logic equations. In implementing such logic equations, AND, OR, and NOT operations are performed by electronic logic gates. To perform the complete addition of one binary bit, a logic circuit must add three inputs, the augend, the addend, and the carry from the previous order. This requires what is known as a "full adder."
Such "full adders" may take a number of different forms. Generally speaking, however, such full adders are relatively complex and moreover involve time-consuming sequential operations rather than simultaneous operations. For example, one type of full adder requires a level switch, seven AND gates, three NAND gates, and two OR gates, for a total of one switch and twelve gates to effect the addition of two binary bits. Another type of full adder requires one level switch, four AND gates, two NAND gates, and three OR gates, for a total of one switch and nine gates to complete the addition of two binary bits. Yet another type of full adder requires one level switch, five AND gates, three OR gates, and one NAND gate for a total of one switch and nine gates to add two binary bits.
Moreover, each of these full adders requires a minimum of four sequential operations to perform its function, thus severly limiting the speed of operation, [as discussed in considerably more detail in the text entitled "Digital Logic and Computer Operations" by Baron and Piccirilli, published by McGraw-Hill Book Company in 1967.]
Accordingly, there is a need for a technique and means for adding binary numbers which does not involve the multiplicity of gates employed in conventional logic circuitry, nor depend upon time-consuming, speed-limiting, sequential functions which are inherent in the gate operations of such conventional logic circuitry.